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洪铭辉教授学术报告通知

  

应李爱珍研究员邀请,半导体电子学专家、台湾清华大学纳米技术、材料科学和微系统中心主任,Tsing Hua Chair Professor洪铭辉教授将于3月17日(星期三)访问上海微系统所,开展学术交流,学术报告安排如下:

报告题目:Nano-electronics beyond Si CMOS

时  间:2010年3月17日 14:30

地  点:8号楼304会议室

 

报告人简介:

                     

Minghwei Hong received his B.S. in Physics from National Taiwan University in June 1973. After serving in Taiwan’s Navy as an Ensign for two years, he then earned an M.S. in 1978 and his Ph.D. in Materials Science and Engineering in 1980 from Univ. of Calif., Berkeley. After a year as a Staff Scientist at Lawrence Berkeley Lab, he joined Bell Labs in September 1981 as a Member of Technical Staff in Research, Murray Hill, New Jersey. In 1999 he became a Distinguished Member of Technical Staff in Semiconductor Research Lab. 

Dr. Hong has worked in many different research topics and has excelled in every one of them, from superconductivity, magnetism, semiconductor lasers, to advanced electronic devices. In 1994, he and his colleagues at Bell Labs discovered a novel oxide of Ga2O3(Gd2O3), which gives the oxide-GaAs hetero-structure a low interfacial density of states in mid 1010 cm-2 eV-1 range, thus solving a problem which has puzzled researchers for the last 35 years. This has led to the first-time demonstration of inversion-channel GaAs/InGaAs MOSFETs, the Holy Grail in compound semiconductors. 

In June 2003, he joined National Tsing Hua University as a TSMC Endowed Chaired Professor. He is now the Director, Center for Nanotechnology, Materials Science, and Microsystems and also a Tsing Hua Chair Professor.

From 2003 to 2008, he and Professor J. Raynien Kwo, and their research groups have made milestone contributions to very low interfacial densities of states, very low electrical current leakage, high-temperature (900C) stability of the high k/III-V MOS, surface Fermi level unpinning mechanism, very small EOT in the high k’s in III-V and Ge, among many other critical properties, essential for the technology beyond 15 nm node CMOS. Moreover, they have fabricated self-aligned inversion-channel In0.53Ga0.47As MOSFETs with very high drain currents and high transconductance.

He is a Fellow of IEEE. His scientific citations are more than 7,000 with an h index of 43.

 

报告内容简介:

 

Nano-electronics beyond Si CMOS

 

Minghwei Hong

aDepartment of Materials Science and Engineering, National Tsing Hua University, Hsinchu, Taiwan

emails: mhong@mx.nthu.edu.tw (M. Hong)

The dimensional scaling in the transistors, which in the past has simultaneously provided high-density, low-cost, and high-performance ICs in Si-based system, does not give device performance advantages. New materials of high  dielectrics and high carrier mobility channel materials, along with novel device architectures are beginning to play important roles for improving the required performance. Looking ahead beyond the 16 nm node ICs, the general consensus is that new high mobility channels such as III-V’s (InGaAs) and Ge will have to be integrated onto Si as “hybrid” chips for future devices; this may occur in 2017-2020.

The intensive quest since early 1960’s in identifying electrically and thermodynamically stable insulators on InGaAs with a low interfacial density of states (Dit) and low leakage current densities, required for the self-aligned inversion-channel InGaAs MOSFET, has finally been answered by our discovery of UHV-deposited Ga2O3 (Gd2O3) [1] and Gd2O3 [2] films on GaAs surfaces, and later by atomic layer deposited (ALD) oxides. The first inversion-channel GaAs and InGaAs MOSFETs were demonstrated with Ga2O3(Gd2O3) as a gate dielectric. With these achievements, the problem puzzling the researchers for the past 35 years has finally been solved. Moreover, the discovery has opened up an entirely new field for the IC industry – III-V MOSFET.

We have successfully extended high  dielectric growth using MBE to that using ALD, on the III-V’s and Ge. Furthermore, we have achieved world-record device performance in self-aligned inversion-channel InGaAs MOSFET, much more superior than those of Si devices in the same gate length, [3,4] as well as a CET of £ 1 nm and high-temperature thermal stability withstanding 850°C RTA in Ga2O3(Gd2O3) and a CET of £ 1 nm in ALD-HfO2 on InGaAs. [5,6] In-situ XPS analysis was used to determine the energy-band parameters at interfaces of high  oxides on InGaAs, and showed that absence of arsenic oxide and elemental arsenic was a principal mechanism responsible for Fermi level unpinning at the dielectric oxide/GaAs interface, thereby leading to effective passivation of the InGaAs surfaces. [7, 8] Self-aligned, inversion-channel Ge MOSFET using MBE-Ga2O3(Gd2O3) without any interfacial layers have shown remarkable device performances. [9]

References

[1] M. Hong, J. Kwo, et al, J. Vac. Sci. Technol.B 14, 2297 (1996).

[2] M. Hong, J. Kwo, A. R. Kortan, et al, Science, 283, 1897 (1999).

[3] T. D. Lin, M. Hong, J. Kwo, et al, Appl. Phys. Lett. 93, 033516 (2008).

[4] H. C. Chiu, M. Hong, J. Kwo, et al, Device Research Conf. (2009).

[5] K. H. Shiu, M. Hong, J. Kwo, et al, Appl. Phys. Lett. 92,172904 (2008).

[6] K. Y. Lee, M. Hong, J. Kwo, et al, Appl. Phys. Lett.92, 252908 (2008).

[7] M. L. Huang, J. Kwo, M. Hong, et al, Appl. Phys. Lett. 89, 012903, (2006).

[8] M. L. Huang, J. Kwo, M. Hong, et al, Appl. Phys. Lett.87, 252104 (2005)

[9] L. K. Chu, T. D. Lin, J. Kwo, and M. Hong, et al, Appl. Phys. Lett. 94, 202108 (2009).